Order Number DM54LSJ, DM54LSW, DM74LSWM or DM74LSN. See Package Number J20A, M20B, N20A or W20A 2. Download Fairchild Semiconductor DM74LSN pdf datasheet file. DM74LSN Octal D-type Transparent Latches And Edge-triggered Flip-flops DM74LS Details, datasheet, quote on part number: DM74LSN.

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The works reference is:. Ddm74ls374n is made up of a network of tracks over the board. To describe the operation of the circuit, channel 1 is used as an example.

During operation there is a potential of mV or less between these two lines. Each comparator package is decoupled from both power rails by 10nF capacitors. Secondly, the component pads adjacent to the ACF packages allow for the addition of a capacitor in parallel to the internal pF.

There are nine data boards in the crate supplied, thus allowing up to channels to be digitised. This power rail separation is to reduce power born noise.


This is an octal D-type flip flop with tri-state outputs. When the operation is complete, the switch is closed for 2us, discharging the capacitor.

A 27k resistor R5 is in series with the output dm74ls374b the comparator to protect the input of the following stage, since the comparator output switches down to the V rail.


The function of this filter is to block DC signals and to control the overall sensitivity of the integrator. After testing the data boards out of the crate, it is important to put these switches back to the ‘Normal’ settings, as illustrated in figure 2 below, before reinserting into the crate. The schematic circuit was drawn using OrCAD software. This would reduce the gain.

The integration dm74ls374 is determined by the separate control board. Manufacturers of the board were Precision Engineering Products Datashedt Ltd, who will retain the production artwork for a limited time.

The digital signal is finally staticized by U7, 74LS Refer to the complete schematic diagram at the end of this section. The file is in the same archive, under:.

Darasheet shielding is provided by the partial groundplane on the component side of the board.

National Semiconductor

There is considerable decoupling throughout the board. The signal fed onto the edge connector is passed directly through the high pass filter. The output of the comparator is open collector and is thus virtually isolated from the input terminals.

This was required due to the obsolescence of the comparators previously used. An integration is then performed across a precision pF capacitor for a single sample interval. There is a separate regulator for the digital Vcc, U The digitiser data board was designed, developed, fabricated and tested by the author.


These boards are controlled by one Control Board in the same crate. Full circuit details and user instructions for the control board are in a separate document.

This documentation concerns the 64 channel Digitiser Data Boards designed in This IC is a quad programmable comparator selected for its low and repeatable input offset voltages. This reads data from each board and datasheer the data to a computer interface along with a count word. This is to supplement an incomplete track.

The two unused controls are pulled high by resistors R1 and R2. The sign of the output of the integrator is detected by a comparator, the output of which is written onto one bit of a 64 bit data register comprising a D-type latch. These are wired back to back between the two ground levels. BANK – signal common to each of the data boards from the control board – pulses low for a period determined by data transfer rate of control board, and changes at twice the rate of FINGER.

The operation is identical for all 64 channels.